A method for locating failure nodes of FPGA interconnect circuits

doi:10.3969/j.issn.1002-2279.2026.04.008

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MICROPROCESSORS ›› 2026, Vol. 47 ›› Issue (4) : 54-59. DOI: 10.3969/j.issn.1002-2279.2026.04.008

A method for locating failure nodes of FPGA interconnect circuits

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2026, 47(4): 54-59 https://doi.org/10.3969/j.issn.1002-2279.2026.04.008

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Received	Published
2025-09-05	2026-08-31
Issue Date
2026-09-15

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