A design of SAR ADC with hybrid resistive-capacitive architecture and variable gain

doi:10.3969/j.issn.1002-2279.2026.02.004

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MICROPROCESSORS ›› 2026, Vol. 47 ›› Issue (2) : 19-24. DOI: 10.3969/j.issn.1002-2279.2026.02.004

A design of SAR ADC with hybrid resistive-capacitive architecture and variable gain

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2026, 47(2): 19-24 https://doi.org/10.3969/j.issn.1002-2279.2026.02.004

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Received	Published
2025-04-10	2026-04-30
Issue Date
2026-06-12

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