Behavioral model-based verification of chiplet interconnect physical layer architecture

CHEN Jiamin, LI Xiangyu, YIN Shujuan

MICROPROCESSORS ›› 2025, Vol. 46 ›› Issue (6) : 29-35.

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MICROPROCESSORS ›› 2025, Vol. 46 ›› Issue (6) : 29-35. DOI: 10.3969/j.issn.1002-2279.2025.06.007

Behavioral model-based verification of chiplet interconnect physical layer architecture

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2025, 46(6): 29-35 https://doi.org/10.3969/j.issn.1002-2279.2025.06.007

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